Introduction To Semi-stable State

- Dec 27, 2019-

Introduction to semi-stable state

The semi-stable state refers to the failure of the trigger to reach a confirmable state within a specified period of time. When a flip-flop enters the metastable state, it cannot predict the output level of the unit, nor can it predict when the output will stabilize at a correct level. During this stabilization period, the flip-flop outputs some intermediate stage levels, or may be in an oscillating state, and this useless output level can be propagated in cascade along each flip-flop on the signal path.